The present invention relates to a synchronizing circuit and more particularly to a synchronizing circuit for synchronizing two mutually asynchronous input signals.
A prior art synchronizing circuit generally consists of a D-type flip-flop (hereinafter called "DFF") in which the state of an input signal is set by a clock pulse and maintained until a next clock pulse. The prior art synchronizing circuit, however, has a metastability problem because it falls into metastability when the transition of the state of the input signal is coincident with a rise of the clock pulse. Once the metastability occurs, the logic circuits using the output of the synchronizing circuit do not operate at all. Since the duration of the metastability if not predictable, it is impossible to properly design the timings of the system and the reliability of the logic system deteriorates excessively.